1. Field of the Invention
The present invention relates to a frequency synthesizer and, more particularly, to a direct frequency synthesizer or Direct Digital Synthesizer (DDS) not using a Phase Locked Loop (PLL).
2. Description of the Related Art
In a conventional frequency synthesizer extensively used in various technological fields, digital values corresponding to a sinusoidal waveform of desired frequency are generated by a counter and a ROM or waveform data table. After that, a quasi-sinusoidal waveform is produced by a digital-to-analog converter. Such a frequency synthesizer is disclosed in, for example, U.S. Pat. No. 3,735,269.
The conventional frequency synthesizer described above is constructed to produce a desired frequency by generating a quasi-sinusoidal stepped waveform. Theoretically, therefore, the synthesizer suffers from phase errors which cannot be remove even if all the circuit elements thereof have ideal values.
Moreover, the quasi-sinusoidal waveform cannot be produced unless four or more regeneration points exist in one period. The frequency of the reference clock, therefore, has to be at least four times as high as the output frequency of the synthesizer. This increases current consumption and obstructs precision and miniaturization.
In addition, a higher order low pass filter (LPF) and, therefore, a coil part are required, making circuit integration difficult.